Abstract

The significance of effective on-chip communication has increased due to the increasing integration of computing cores in contemporary systems. Since routing techniques affect latency, throughput, and power consumption while reducing congestion and deadlock, they are essential to Network-on-Chip (NoC) performance. While adaptive and hybrid algorithms like Q-learning (Q), Path-based Randomized Oblivious Minimal (PROM), and Dynamic Adaptive Deterministic (DyAD) promise greater adaptability, deterministic techniques like XY provide simplicity but lack flexibility. The deterministic, adaptive, and hybrid routing algorithms in NoC are assessed in this study under bursty and constant bit rate (CBR) traffic. By combining delay, throughput, and power, a composite Performance Metric (PM) is used to measure routing efficiency. According to the results, PROM outperforms Q-routing by a substantial margin, achieving the highest efficiency under bursty traffic with a PM of 38.42%. DyAD performs best for CBR traffic, with a PM of 34.97%, compared to XY’s PM of 33.64%. The results show that traffic conditions affect the algorithm's applicability. DyAD performs well under constant loads and PROM is well suited for unpredictable traffic.

Keywords

Network on Chip, Mesh Topology, XY Routing, PROM Routing, Q Routing, Dyad Routing, Throughput, Latency,

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References

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